Title :
A new two task algorithm for clock mode fault simulation in sequential circuits
Author :
Hill, Fredrick J. ; Abuelyamen, Eltayeb ; Huang, W.-K. ; Shen, G.-Q.
Author_Institution :
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
Abstract :
A novel approach to clock-mode simulation of sequential circuits is introduced. Surrogate fault propagation is used for processing stored faults and extracting new faults from combinational logic. Problem fault types are analyzed and treated as exceptions.<>
Keywords :
clocks; logic testing; sequential circuits; clock mode fault simulation; combinational logic; sequential circuits; stored faults processing; surrogate fault propagation; two task algorithm; Circuit faults; Circuit simulation; Circuit testing; Clocks; Computational modeling; Computer simulation; Logic design; Logic testing; Sequential analysis; Sequential circuits;
Conference_Titel :
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-8186-0864-1
DOI :
10.1109/DAC.1988.14820
