Integrated high-voltage/Low-voltage MOS devices

A new high voltage device structure and a corresponding fabrication process have been developed. The device has a planar, integrable, closed geometry structure that utilizes a highly resistive polysilicon field relief electrode (field plate) to control device breakdown voltage and transconductance. The active device area is totally covered by polysilicon or metal, contributing to long term stability and reliability. The closed geometry structure is self-isolating and thus multiple high voltage devices and low voltage NMOS logic can be integrated on the same chip. Operation in excess of 500 Volts has been demonstrated and an array of 16 such devices driven by low voltage logic has been designed, fabricated, and tested, Principal applications for this technology are displays and electrographic printing.