DocumentCode
3555533
Title
350 ° C CMOS logic process
Author
Beasom, J.D. ; Moore, R.D. ; Mohammed, G. ; Draper, B.L.
Author_Institution
Harris Semiconductor, Melbourne, Florida
fYear
1981
fDate
7-9 Dec. 1981
Firstpage
350
Lastpage
353
Abstract
A dielectrically isolated self-aligned silicon gate CMOS process designed for high temperature operation is described. Component characteristics over the 25°C to 325°C range are presented. Circuit operation to 380°C is demonstrated. Circuit and process modifications which could extend operating temperature to about 450°C are suggested.
Keywords
CMOS logic circuits; CMOS process; Current supplies; Diodes; Extrapolation; Leakage current; MOS devices; Protection; Temperature; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1981 International
Conference_Location
Washington, DC, USA
Type
conf
DOI
10.1109/IEDM.1981.190085
Filename
1482038
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