U-groove isolation technique for high speed bipolar VLSI´s

A new, buried dielectric isolation technique, called U-groove Isolation, has been developed. This U-Iso technique has led to a 66% reduction in bipolar device area, in isolation capacitance by a factor of seven, and ECL gate delay by 30%. Isolation widening, known as "bird\´s beak" or V-groove anisotropic etching, is eliminated and, with a two-step low temperature process, narrow and deep U-shaped isolation (depth/width>2) can be realized. The minimum isolation width for a device fabricated by 1-µm photolithography is decreased from 7µm, using conventional selective oxide isolation, to 2.5µm. Isolation voltage is improved from 25V to 50V, and isolation capacitance from 70fF to 10fF, with the channel cut P⁺completely separated from the N⁺-BL. Base resistance is cut by 30% through elimination of bird\´s beak. Gate delay is reduced from 0.29ns/gate to 0.17ns/gate for experimental 21-stage, 3- input ECL circuits.