Title :
150 Volt vertical channel GaAs FET
Author :
Campbell, P.M. ; Ehle, R.S. ; Gray, P.V. ; Baliga, B.J.
Author_Institution :
General Electric Company, Schenectady, NY
Abstract :
A vertical channel buried junction gate GaAs FET structure is described. The fabrication process includes a novel technique of growing the second epitaxial layer at a high enough temperature using liquid phase epitaxy to activate the gate implant, which eliminates the need for a separate annealing step. Devices fabricated in this manner exhibit blocking voltages of up to 150V and blocking gains of over 10. Gate turn-off speeds are faster than 5 nsec.
Keywords :
Annealing; Epitaxial growth; Epitaxial layers; FETs; Fabrication; Gallium arsenide; Implants; MOSFETs; Silicon; Voltage;
Conference_Titel :
Electron Devices Meeting, 1982 International
DOI :
10.1109/IEDM.1982.190267