Title :
A VLSI multiple input/Output ISL gate demonstrated in a 1.25 µm oxide-isolated bipolar process
Author :
Vu, T. ; Roberts, P. ; Lamb, D. ; Belt, R. ; Bostick, D. ; Zafar, N. ; Lee, G. ; Joseph, Jayaraj ; Prestholdt, D. ; Pai, S. ; Burbank, D. ; Vyas, H. ; Nielsen, D.
Author_Institution :
Honeywell Systems and Research Center, Minneapolis, Minnesota
Abstract :
An improved ISL gate structure has been characterized which offers multiple inputs and outputs for high performance VLSI. The gate features remote Schottky diodes to eliminate current hogging and to perform front-end logic functions, and provides on-gate vertical and horizontal routing channels. A current level of 20µA (25°-C) was chosen for the optimum speed versus power trade-off over the full military ambient temperature range (-55°C to 125°C). Scaling the gate current from 100µA down to 20µA results in the following advantages: a) very little degradation of logic swing voltage versus fanout at different temperatures, b) no need to modify the substrate pnp transistor´s collector resistance to avoid saturation. Measurements of gate delay and logic swing at this 20µA current show 1.2ns and 240mv respectively at room temperature for a speed power product of 36fJ. The gate consumes an area of 18.8µm × 92.8µm (=2.7 mils2) and provides 3 vertical × 14 horizontal tracks for connection. The 30µw gate demonstrates a figure-of-merit of 40K gates/cm2× 33MHz = 1.3 × 1012gate-Hz/cm2and has also been operated at 22.5µw (15µA) without requiring modifications to our standard 1.25µm oxide isolated process.
Keywords :
Current measurement; Degradation; Electrical resistance measurement; Logic functions; Power measurement; Routing; Schottky diodes; Temperature distribution; Very large scale integration; Voltage;
Conference_Titel :
Electron Devices Meeting, 1982 International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1982.190385