Abstract :
A high density, non-volatile RAM cell composed of a volatile RAM component, merged with a non-volatile element which "shadows" the RAM component, is described. Unlike earlier low density Shadow RAM approaches, small cell size is achieved here by utilizing a vertically integrated 1T-1C DRAM element merged with a highly compact, vertically integrated, triple-level poly-silicon floating gate structure. Non-volatile operations on the floating gate stack are performed by Fowler-Nordheim electron injection through both a tunnel oxide, and through a first level to third level poly-silicon sidewall which has proven successful in earlier E2PROMs. The non-volatile approach lends itself readily to 5 Volt-only implementation, using on-chip voltage multiplication techniques, by virtue of the miniscule Fowler-Nordheim charging currents needed, combined with a single high voltage STORE implementation scheme using a common third level poly-Si line. Cell operation for the non-volatile BULK STORE and BULK RECALL functions as well as volatile bit operations are described. Also shown is the cell layout, which consumes 1.5 mil2area, based on 3µ design rules, making it readily compatible with 16K NOVRAM density levels.
