Title :
Theoretical, practical and analogical limits in ULSI
Author_Institution :
Stanford University, Stanford, California
Keywords :
CMOS technology; Information processing; Integrated circuit interconnections; Logic design; Material properties; Semiconductor device measurement; Silicon; Ultra large scale integration; Very large scale integration; Voltage;
Conference_Titel :
Electron Devices Meeting, 1983 International
DOI :
10.1109/IEDM.1983.190428
