Title :
InP JFETs by shallow Zn diffusion
Author :
Boos, J.B. ; Weng, T.H. ; Binari, S.C. ; Kelner, G. ; Henry, R.L.
Author_Institution :
Naval Research Laboratory, Washington, D.C.
Abstract :
This paper reports on the fabrication and performance of 2 µm gate length, Zn-diffused, InP junction field-effect transistors (JFETs). Device fabrication uses a semi-sealed, selective diffusion technique to form a shallow p+gate region. The measured transconductance of the Zn-diffused JFETs ranged from 80-100 mS/mm. At 4.5 GHz, maximum available gains up to 7.2 dB were observed. With a 9.0 V drain bias, scaled output powers up to .52 W/mm were achieved.
Keywords :
Annealing; Dielectrics; FETs; Fabrication; Indium phosphide; JFETs; Microwave devices; Testing; Vents; Zinc;
Conference_Titel :
Electron Devices Meeting, 1983 International
DOI :
10.1109/IEDM.1983.190584