• DocumentCode
    3556152
  • Title

    A new floating gate cell and technology for a 5 volt only CMOS 16K EEPROM

  • Author

    Logie, S. ; Harari, E. ; Li, S. ; Liu, W. ; Das, R.

  • Author_Institution
    Synertek Inc., Santa Clara, California
  • Volume
    29
  • fYear
    1983
  • fDate
    1983
  • Firstpage
    733
  • Lastpage
    735
  • Keywords
    CMOS process; CMOS technology; Degradation; EPROM; Electrodes; Nonvolatile memory; Parasitic capacitance; Power generation; Threshold voltage; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1983 International
  • Type

    conf

  • DOI
    10.1109/IEDM.1983.190612
  • Filename
    1483737