• DocumentCode
    3556169
  • Title

    Fault simulation in a distributed environment

  • Author

    Duba, Patrick A. ; Roy, Rabindra K. ; Abraham, Jacob A. ; Rogers, William A.

  • Author_Institution
    Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
  • fYear
    1988
  • fDate
    12-15 June 1988
  • Firstpage
    686
  • Lastpage
    691
  • Abstract
    Fault simulation of VLSI circuits takes considerable computing resources and there have been significant efforts to speed up the fault simulation process. A distributed fault simulator implemented on a loosely-coupled network of general-purpose computers is described. The techniques used result in a close to linear speedup and can be used effectively in most industrial VLSI CAD (computer-aided design) environments.<>
  • Keywords
    VLSI; circuit CAD; circuit analysis computing; logic CAD; CAD; VLSI circuits; computer-aided design; distributed environment; fault simulation; logic design; loosely-coupled network; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Costs; Hardware; Sequential circuits; Test pattern generators; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
  • Conference_Location
    Anaheim, CA, USA
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-0864-1
  • Type

    conf

  • DOI
    10.1109/DAC.1988.14843
  • Filename
    14843