DocumentCode
3556331
Title
A new trench isolation technology as a replacement of LOCOS
Author
Mikoshiba, H. ; Homma, T. ; Hamano, K.
Author_Institution
NEC Corporation, Sagamihara, Kanagawa, Japan
Volume
30
fYear
1984
fDate
1984
Firstpage
578
Lastpage
581
Abstract
A new trench isolation technology that is replaceable to LOCOS and is suitable for submicron VLSIs is presented. The technology is featured with bird´s beak free, planar surface, low defect generation, and adaptable to any isolation width from submicron to very large dimensions. The key process steps consist of filling the trench with polysilicon to a half of the trench depth by utilizing photoresist etch back, and subsequent full oxidization of the recessed polysilicon to fill the trench by the oxide. Device characteristics examined experimentally are equivalent to those of LOCCS isolated devices. The feasibility of this technology has been verified successfully by fabricating a 64K bit DRAM.
Keywords
Fabrication; Filling; Isolation technology; National electric code; Oxidation; Random access memory; Resists; Silicon; Very large scale integration; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1984 International
Type
conf
DOI
10.1109/IEDM.1984.190786
Filename
1484557
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