DocumentCode
3556362
Title
A 2 micron high performance bipolar 64K ECL static RAM technology with 200 square microns contactless memory cell
Author
Vora, M. ; Chien, F. ; Burton, G. ; Koh, Y.B. ; Brown, R. ; Herndon, W. ; Heald, R.
Author_Institution
Fairchild Research Center, Palo Alto, CA
Volume
30
fYear
1984
fDate
1984
Firstpage
690
Lastpage
693
Abstract
Small semiconductor memories with READ/ WRITE times of less than 15 ns have typically been bipolar ECL devices. The densest such chip possible with a state-of-the art process such as 2 micron Isoplanar has been a 16K ECL RAM with a cell size of 600 to 800 square microns (Ref. 1). In order to make a practical 64K ECL RAM with 2 micron layout rules, cell size has to be less than 200 square microns. This new technology has been developed which meets the memory cell size requirement while maintaining performance.
Keywords
Anodes; Planarization; Random access memory; Read-write memory; Resistors; Semiconductor diodes; Silicides; Strips; Surface topography; Wet etching;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1984 International
Type
conf
DOI
10.1109/IEDM.1984.190817
Filename
1484588
Link To Document