DocumentCode
3556445
Title
Trap generation in gate oxide layer of MOS structures encapsulated by silicon nitride
Author
Fujita, Shizuo ; Uemoto, Yasuhiro ; Sasaki, Akio
Author_Institution
Kyoto University, Kyoto, Japan
Volume
31
fYear
1985
fDate
1985
Firstpage
64
Lastpage
67
Abstract
Mechanism of trap generation in gate oxide of MOS structure encapsulated by silicon nitride (SiN) is experimentally investigated. Plasma damage results positive charges but few hot-electron traps in the gate oxide layer. Generation of hot-electron traps is attributed to the affects of SiN encapsulant during the device operation. Lower rf power and higher SiH4 flow rate for the SiN deposition, and subsequent thermal annealing in H2 are desirable to reduce the instability. When fluorinated SiN is used as an encapsulant, the generation of hot-electron traps is successfully suppressed, suggesting possibility to realize higher reliable devices.
Keywords
Annealing; Electrodes; Electron traps; Hydrogen; Plasma applications; Plasma devices; Plasma temperature; Silicon compounds; Stress; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1985 International
Type
conf
DOI
10.1109/IEDM.1985.190892
Filename
1485442
Link To Document