DocumentCode :
3556492
Title :
Modified LDD device structures for VLSI
Author :
Bampi, S. ; Plummer, J.D.
Author_Institution :
Stanford University, Stanford, CA
Volume :
31
fYear :
1985
fDate :
1985
Firstpage :
234
Lastpage :
237
Abstract :
In LDD-like MOSFET structures previously studied [1-3], narrow, self-aligned 
regions are introduced between the channel and the 
source-drain regions. In this paper we describe a new n-MOS device structure which attempts to overcome some of the reliability problems [4] of LDD devices. Instead of a pure region, we introduce a short-channel JFET under the sidewall oxide at the drain end in series with the intrinsic MOSFET as shown in Fig.1. Both 2-D device simulations and experimental results are shown to demonstrate the operation of this device and its potential for VLSI applications.
regions are introduced between the channel and the source-drain regions. In this paper we describe a new n-MOS device structure which attempts to overcome some of the reliability problems [4] of LDD devices. Instead of a pure region, we introduce a short-channel JFET under the sidewall oxide at the drain end in series with the intrinsic MOSFET as shown in Fig.1. Both 2-D device simulations and experimental results are shown to demonstrate the operation of this device and its potential for VLSI applications.Keywords :
Circuit simulation; Design optimization; Hot carriers; Integrated circuit reliability; Laboratories; MOSFET circuits; Maintenance; Surface resistance; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1985 International
Type :
conf
DOI :
10.1109/IEDM.1985.190939
Filename :
1485489
Link To Document :
