Modified LDD device structures for VLSI

In LDD-like MOSFET structures previously studied [1-3], narrow, self-aligned regions are introduced between the channel and the source-drain regions. In this paper we describe a new n-MOS device structure which attempts to overcome some of the reliability problems [4] of LDD devices. Instead of a pure region, we introduce a short-channel JFET under the sidewall oxide at the drain end in series with the intrinsic MOSFET as shown in Fig.1. Both 2-D device simulations and experimental results are shown to demonstrate the operation of this device and its potential for VLSI applications.