DocumentCode
3556495
Title
Reliability and performance of submicron LDD NMOSFET´s with buried As n-impurity profiles
Author
Grinolds, Hugh R. ; Kinugawa, Masaaki ; Kakumu, Masakazu
Author_Institution
Toshiba Corporation, Kawasaki, Japan
Volume
31
fYear
1985
fDate
1985
Firstpage
246
Lastpage
249
Abstract
The reliability and performance of submicron LDD NMOSFET\´s with retrograde Arsenic impurity profiles in the n-region were investigated. These structures were compared to devices with conventional As drains and phosphorus-implanted (P+) LDD\´s. Reduced substrate current was expected from 2D simulation and was confirmed experimentally. Lifetime under DC stress was improved by a factor of 15 over that observed for LDD devices. Transconductance was 93% of a conventional NMOSFET and 5% greater than a LDD FET having a P+implant of
cm-2, CMOS ring oscillator stage delay was equal to or better than the delay for LDD and conventional NMOSFET\´s and depicted a tradeoff between gm and gate-drain overlap capacitance Cdg . Short channel effects were evaluated for Leff down to 0.45 µm and found to be similar to standard LDD designs.
cm-2, CMOS ring oscillator stage delay was equal to or better than the delay for LDD and conventional NMOSFET\´s and depicted a tradeoff between gKeywords
Capacitance; Degradation; Delay effects; Implants; MOSFET circuits; Reliability engineering; Semiconductor impurities; Stress; Substrates; Surface resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1985 International
Type
conf
DOI
10.1109/IEDM.1985.190942
Filename
1485492
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