Properties of trench capacitors for high density DRAM applications

Due to increasing levels of integration, it is expected that next generation DRAMs will make use of trench capacitors to minimize the area of a cell. In this paper we examine the properties of oxides grown in trenches and compare them with comparable oxides grown on planar surfaces. We also examine the effects of various cell to cell spacing on the trench to trench leakage. We conclude that despite the challenges of trench technology, it is excellent for use in 1Mbit and 4Mbit DRAMS.