Title :
Lightly impurity doped (LD) Mo silicide gate technology
Author :
Kakumu, Masakazu ; Matsunaga, Jun´Ichi
Author_Institution :
Toshiba Corporation, Kawasaki, Japan
Abstract :
Lightly impurity Doped (LD) Mo silicide gate technology has been developed. LD Mo silicide gate technology provides a non-degenerated gate material, where the temperature dependence of the Fermi level in the channel region can be cancelled. This technology has been applied to CMOS devices to demonstrate high speed operation at low temperatures.
Keywords :
CMOS technology; Impurities; Integrated circuit interconnections; MOS devices; MOSFET circuits; Semiconductor materials; Silicides; Temperature dependence; Temperature distribution; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 1985 International
DOI :
10.1109/IEDM.1985.190989
