DocumentCode
3556603
Title
A 256K high performance CMOS EEPROM technology
Author
Chen, Ling ; Owen, Scott W. ; Jenq, Ching S. ; Renninger, Alan R.
Author_Institution
SEEQ Technology, Inc., San Jose, CA
Volume
31
fYear
1985
fDate
1985
Firstpage
620
Lastpage
623
Abstract
A high performance CMOS technology has been developed for a 256K EEPROM. Using this technology, a 54um2EEPROM cell has been realized. The high coupling ratio of the cell, together with the use of an ultrathin oxynitride layer as a tunneling dielectric, allows cell programming voltages as low as 17 volts at a programming time of 0.1 msec. The intrinsic cell endurance has been improved to greater than 108cycles. The utilization of an optimized interpoly dielectric process and low temperature reflow glass prevent the degradation of tunneling dielectric. A special gettering technique reduces tunneling dielectric defects as well as junction leakage, thus paving the way to 5 volt-only operation over full military temperature range.
Keywords
CMOS process; CMOS technology; Dielectrics; EPROM; Gettering; Glass; Isolation technology; MOS devices; Temperature; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1985 International
Type
conf
DOI
10.1109/IEDM.1985.191049
Filename
1485599
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