Title :
Mechanisms for process-induced leakage in shallow silicided junctions
Author :
Liu, R. ; Williams, D.S. ; Lynch, W.T.
Author_Institution :
AT&T Bell Laboratories Murray Hill, New Jersey
Abstract :
Leakage mechanisms for shallow, silicided, n+/p junctions have been investigated. This study consists of two parts: (A) to isolate the processing steps that cause junction leakage, and (B) to study the mechanisms that cause leakage. Reactive ion etching and improper junction and silicide formation procedures are found responsible for junction leakage, though through different mechanisms. The mechanism for leakage is mainly due to generation centers in the depletion region caused by deep levels from damage, or from impurities. Junction leakage can be avoided by carefully designing the details of silicide and junction formation and by carefully fine-tuning the processing steps. The best junctions are made by implanting As into CoSi2and by driving the As into Si from the silicide at 800°C. The lower temperature drive is possible since all ion damage is contained within the silicide, causing no damage in the Si substrata. Very shallow, silicided, n+/p junctions can be fabricated reproducibly. These junctions demonstrate the same electrical characteristics as deeper, un-silicided junctions, indicating that there is no fundamental barrier prohibiting fabrication of low-leakage, shallow silicided junctions.
Keywords :
Annealing; Atomic layer deposition; Contact resistance; Diodes; Etching; Impurities; Leakage current; Metallization; Silicidation; Silicides;
Conference_Titel :
Electron Devices Meeting, 1986 International
DOI :
10.1109/IEDM.1986.191110