Advances in packaging for VLSI systems

Limits to the speed of systems comprising an assembly of VLSI circuits are often set by thermal considerations and by chip-to-chip communications. The use of liquid cooling and of micromachining technology appears to have eliminated thermal considerations as a relevant, fundamental limit, power densities in excess of 1 KW/cm²have been demonstrated. Chip to chip delays are less easy to eliminate, but here again the problem can be alleviated with novel micromachining technology. Analysis of a multilevel interconnect system suggests that we should be able to employ 25 signal lines/mm (allowing 1000 pin-outs around the perimeter of a 1 cm × 1 cm chip) with a propagation velocity better than c/2, an attenuation of less than 0.05 dB/mm and much less than 10% crosstalk over 10 cms.