Three transistor cell for high speed CMOS EPROM technology

A high performance 1.5 micron N-well double poly, double metal CMOS process technology has been developed. The patented three transistor cell coupled with this process technology achieved a 25ns 64K high speed EPROM device (8K by 8). The memory core cell with a size of 9.5um × 14.5um was designed to take advantage of maximizing read and write capabilities independently. Seven different types of transistors were generated and optimized to make this possible. A novel interpoly dielectric structure has been developed to simplify the process technology which enhances the manufacturability. High speed (25ns) and small chip size (4.72mm × 3.82mm) were achieved by utilizing a double metal technology.