DocumentCode
3556836
Title
A selectively pumped p-well memory array technology for high density static RAMs
Author
Wang, K.L. ; Mauntel, R.W. ; Parrillo, L.C. ; Bader, M.D. ; Herr, N. ; Cosentino, S.J. ; Leiss, J.E. ; Madan, S.K. ; Mendez, H.J. ; Soorholtz, V.W. ; Kung, R.I.
Author_Institution
Motorola, Inc., Austin, Texas
Volume
32
fYear
1986
fDate
1986
Firstpage
596
Lastpage
599
Abstract
A selectively pumped p-well SRAM cell technology is discussed. This technology allows the optimization of circuit speed while reducing the array leakage. In addition, a pumped p-well cell technology improves cell stability, reduces bit line capacitance, and lowers soft error rate. This technology is demonstrated in a 21ns 256K CMOS SRAM fabricated with an advanced 1.2-um double-level poly, double-level metal CMOS technology.
Keywords
CMOS technology; Capacitance; Circuit stability; Doping; Error analysis; MOS devices; Random access memory; Read-write memory; Resistors; Subthreshold current;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1986 International
Type
conf
DOI
10.1109/IEDM.1986.191260
Filename
1486518
Link To Document