Title :
Bipolar CMOS merged structure for high speed M bit DRAM
Author :
Kobayashi, Y. ; Oohayashi, M. ; Asayama, K. ; Ikeda, T. ; Hori, R. ; Itoh, K.
Author_Institution :
Hitachi Ltd., Hitachi, Ibaraki, Japan
Keywords :
Bipolar transistors; CMOS process; CMOS technology; Capacitance; Driver circuits; Error analysis; Fabrication; Laboratories; MOSFET circuits; Random access memory;
Conference_Titel :
Electron Devices Meeting, 1986 International
DOI :
10.1109/IEDM.1986.191317
