Title :
A high-speed 22-bit floating-point digital signal processor: the FSPU
Author :
Yernaux, B. ; Jespers, P.G.A.
Author_Institution :
Lab. de Microelectron., Univ. Catholique de Louvain, Belgium
Abstract :
The authors describe the FSPU, which is a single-chip 22-bit signal and speech processor. The FSPU is based on a novel processing unit that achieves very high computation throughputs, while using floating-point arithmetic to achieve wide dynamic range and high precision. The developed architecture is intended to go beyond the limits of the standard general-purpose digital signal-processing implementations and to make floating-point signal processing more attractive. Testability, control flexibility, and area were strongly emphasized. A 3-μm CMOS prototype has been realized
Keywords :
CMOS integrated circuits; VLSI; computer architecture; digital signal processing chips; speech analysis and processing; 22 bit; 3 micron; CMOS; DSP; FSPU; chip area; computer architecture; control flexibility; floating-point arithmetic; floating-point digital signal processor; floating-point signal processing; high computation throughputs; high precision; prototype; single chip processor; speech processor; testability; wide dynamic range; Computer architecture; Digital signal processing; Digital signal processors; Dynamic range; Floating-point arithmetic; Signal processing; Speech processing; Standards development; Testing; Throughput;
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo
DOI :
10.1109/ISCAS.1988.14869
