A submicron dual buried layer twin well CMOS SEG process

This paper describes an advanced submicron CMOS process which uses selective epitaxy to successfully build high quality and high density CMOS transistors. The need for LOCOS is eliminated and devices are isolated by thick thermal oxide without the use of trenches. By properly combining processing parameters during epitaxial growth, optimum selectivity, faceting, and device characteristics are obtained. The device quality of the selectively grown epitaxial film is evidenced by high yielding ring oscillator circuits.