Title :
A super self-aligned source/drain MOSFET
Author :
Lau, C.K. ; Shibata, H. ; Saitoh, M. ; Matsuno, T. ; Samata, S. ; Itoh, H. ; Sasaki, H. ; Hashimoto, K.
Author_Institution :
Hewlett-Packard Company, Palo Alto, CA, USA
Abstract :
A novel MOSFET structure is presented in which the source/drain area is minimized by self-aligning to the gate polysilicon. This is achieved by forming a nitride spacer followed by a second field oxidation after gate delineation. A selective silicon growth technique is used to extend the source/drain over the second field oxide for easy contacting. A fully self-aligned contact scheme is employed to conserve overall device area. Besides saving device area and minimizing parasitic capacitance, experimental results at one-micron geometry indicate that other device characteristics are similar to that of the conventional LDD-MOSFET. This device is expected to be scalable well into the submicron regime.
Keywords :
Anisotropic magnetoresistance; Etching; Implants; MOSFET circuits; Oxidation; Parasitic capacitance; Protection; Semiconductor devices; Silicon; Very large scale integration;
Conference_Titel :
Electron Devices Meeting, 1987 International
DOI :
10.1109/IEDM.1987.191431