Transient substrate current delay in NMOSFETs

When a MOSFET inverter is operated in the regime of avalanche breakdown of the n-channel device, excess charge storage from impact ionization is found to occur near the surface of the substrate. When this driver transistor is turned off, the drainage of this excess charge causes a transient delay in the substrate current. This parasitic current flow can lead to unexpected circuit behavior or circuit failure. In this paper, experimental as well as three-dimensional device simulation results using CADDETH will be discussed, and some possible implications of this charge storage effect will briefly be presented.