DocumentCode :
3557230
Title :
Oxides grown on textured single-crystal silicon for low programming voltage non-volatile memory applications
Author :
Fong, Y. ; Wu, A.T. ; Moazzami, R. ; Ko, P.K. ; Hu, C.
Author_Institution :
University of California, Berkeley, Berkeley, CA
Volume :
33
fYear :
1987
fDate :
1987
Firstpage :
889
Lastpage :
891
Abstract :
Oxides grown on textured single-crystal silicon (TSC oxides) have been fabricated for use in low programming voltage non-volatile memories. A 230 A TSC oxide exhibited enhanced electron injection in both polarities reducing the voltage necessary for Jg= +1 mA/cm2from 21 V for normal (untextured) 230 A oxides to 5 V. This made the 230 A TSC oxide equivalent to a 55 A normal oxide. Charge-to-breakdown (QBD) measurement show a larger intrinsic QBDand also a much better QBDhistogram (for 1.1. mm2capacitors) for the 230 A TSC oxide than for 230 A and 60 A normal oxides. Presently, floating-gate EEPROMs are fabricated with either very thin tunnel oxides or thicker oxides grown on polycrystalline silicon (Polyoxides). For very thin tunnel oxides, careful growth of the 100 A oxide is required to avoid early oxide breakdown due to defects. Further scaling of the oxide thickness for lower programming voltages may be difficult. Polyoxides, which utilize the electric field enhancement at the polysilicon-oxide interface, can be thicker (600A). Polyoxides have higher electron trapping rates and memory window closing due to electron trapping limits the memory endurance. Future scaling of the polyoxide thickness for lower programming voltages is not straightforward since the enhanced electron injection effect is reduced for thinner polyoxides. We report here the electrical properties and integrity of oxides grown on textured single-crystal silicon (TSC oxides), showing that TSC oxides can overcome limitations of both very thin tunnel oxides and thicker polyoxides.
Keywords :
Capacitors; Current measurement; EPROM; Electric breakdown; Electron traps; Histograms; Low voltage; Nonvolatile memory; Q measurement; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1987 International
Type :
conf
DOI :
10.1109/IEDM.1987.191584
Filename :
1487542
Link To Document :
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