• DocumentCode
    3557416
  • Title

    Thermal protection of an 80V silicon-on-insulator LDMOS transistor for power-over-Ethernet applications

  • Author

    Hastings, Alan ; Maramreddy, Sudha ; Patoka, Martin

  • Author_Institution
    Texas Instruments Inc., Dallas, TX, USA
  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    139
  • Lastpage
    142
  • Abstract
    This paper describes thermal protection for the pass transistor of a power-over-Ethernet powered device controller developed on a bonded-wafer silicon-on-insulator process. The 1Ω, 80V LDMOS transistor dissipates up to 8W during a typical fault condition. Current limiting, tightly coupled over-temperature sensing, and drain-to-source voltage sensing combine to limit measured peak junction temperatures to less than 250°C.
  • Keywords
    MOSFET; local area networks; power field effect transistors; silicon-on-insulator; 1 ohm; 8 W; 80 V; junction temperatures; over-temperature sensing; pass transistor; power-over-Ethernet applications; silicon-on-insulator LDMOS transistor; thermal protection; voltage sensing; Bonding; Cables; Circuits; Current limiters; Ethernet networks; Fingers; Instruments; Protection; Silicon on insulator technology; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and ICs, 2005. Proceedings. ISPSD '05. The 17th International Symposium on
  • Print_ISBN
    0-7803-8890-9
  • Type

    conf

  • DOI
    10.1109/ISPSD.2005.1487970
  • Filename
    1487970