Predeposition through a polysilicon layer as a tool to reduce anomalies in phosphorus profiles and the push-out effect in n-p-n transistors

The carrier concentration profiles obtained after the diffusion of phosphorus through a thin polycrystalline silicon film into a silicon substrate are investigated. It is shown that it is possible, by performing the predeposition process at 1000°C or 920°C, to avoid or greatly lower the high-diffusivity tail usually present in phosphorus profiles. It is also reported that, in sutable experimental conditions, predepositions through a polycrystalline layer reduce the push-out effect under the emitter of n-p-n bipolar transistors. The results are explanined on the basis of an interstitial-phosphorus-difussion mechanism in silicon, and by supposing that the excess of interstitials generated by the ingoning p atoms is partially adsorbed at the grain boundareis of the polycrystalline film.