• DocumentCode
    3558208
  • Title

    Novel p-n junction polysilicon dual-gate mosfet for analogue applications

  • Author

    Anand, K.V. ; Chamberlain, S.G.

  • Author_Institution
    Fairchild Camera & Instrument Corporation, Advanced Research & Development Laboratory, Palo Alto, USA
  • Volume
    129
  • Issue
    2
  • fYear
    1982
  • fDate
    4/1/1982 12:00:00 AM
  • Firstpage
    58
  • Lastpage
    60
  • Abstract
    Fabrication details and experimental data are given for a dual-input-gate p-channel enhancementmode MOSFET, which can be used for analogue applications. The device employs a novel gate structure in which a single-level polysilicon gate is laterally segmented along the channel length by means of alternate p+ and n+ doping, thus considerably simplifying the technology. It is proposed that the outer gates be used as the input terminals. Both practical and theoretical results for the static output characteristics are given, together with the relevant AC parameters, e.g. the forward conductance of the two gates and the input impedance between the gate terminals. Satisfactory w-channel devices, with n+-p+-n+ segmented gates, were also fabricated, and data from these are also given.
  • Keywords
    insulated gate field effect transistors; AC parameters; MOSFET; analogue applications; dual-input-gate p-channel enhancement-mode; forward conductance; input impedance; n+-p+-n+ segmented gates; n-channel devices; p-n junction polySi dual gate; static output characteristics;
  • fLanguage
    English
  • Journal_Title
    Solid-State and Electron Devices, IEE Proceedings I
  • Publisher
    iet
  • Conference_Location
    4/1/1982 12:00:00 AM
  • ISSN
    0143-7100
  • Type

    jour

  • DOI
    10.1049/ip-i-1.1982.0011
  • Filename
    4642608