Stability of amorphous-silicon thin-film transistors

The stability of amorphous-silicon/silicon-nitride thin-film transistors has been investigated by measuring the time dependence of the source-drain current decay under a constant DC gate bias at a fixed temperature. At all temperatures (25¿100°C) and gate voltages (6¿36V) used in our experiments, the current decay is due entirely to a shift in the threshold voltage caused by electron trapping in the silicon-nitride layer. The threshold shift is a strong function of temperature. The source-drain current decay after 104s continuous DC operation is 4% at 25°C, rising to 20% at 70°C. This degree of stability is adequate for application to matrix addressing of large-area alphanumeric displays.