• DocumentCode
    3558635
  • Title

    Designing optoelectronic integrated circuit (OEIC) receivers for high sensitivity and maximally flat frequency response

  • Author

    Das, Mukunda B. ; Chen, Jau-Wen ; John, Eugene

  • Author_Institution
    Dept. of Electr. Eng., Pennsylvania State Univ., University Park, PA, USA
  • Volume
    13
  • Issue
    9
  • fYear
    1995
  • fDate
    9/1/1995 12:00:00 AM
  • Firstpage
    1876
  • Lastpage
    1884
  • Abstract
    This paper examines previously overlooked, but a highly effective, optimization approach to designing transimpedance OEIC receivers based on heterojunction bipolar and field-effect transistors (HBT´s & HFET´s) with high sensitivity and maximally flat frequency response. It is shown that the 3-dB bandwidth of amplifiers involving single-transistor common-emitter (CE) and common-source (CS) input stages, and the corresponding cascoded input stages can be universally expressed as f3-dB≅1/2π√(τ´(cμ+cL )Rf), where τ´ is the effective transit time of the transistor including the effect of the photodetectors capacitance, cμ is the feedback capacitance of the transistor, cL is the capacitance in parallel to the collector or drain effective load conductance (g¯L), and Rf is the feedback resistance of the amplifier that ensures a much greater than unity loop-gain. The gain-bandwidth product can also be universally expressed as Rf×f3-dB≅gm /√2πg¯Lcin, where gm is the transconductance of the transistor and cin is the total capacitance appearing at the input of the respective amplifier. For the single-transistor CE and CS input stages the dependence of the optimum values of Rf on g¯L can be expressed as Rf=2τ´(cμ+cL)/(g¯Lτ´+c μ)2, whereas for the corresponding cascoded input stages the same expression also applies but with cμ=0 in the denominator. Since designing high sensitivity OEIC receivers require high values of Rf and correspondingly low values of g¯L, thus it follows that amplifying transistors must be operated at the lowest possible current but without degradation of their high frequency performance. A low-value of the base or gate bias current also ensures a low level of shot noise thus further enhancing the sensitivity. Because of a low gm to drain current ratio in HFET´s, receivers involving only the cascoded input stage, and not the single-transistor CS input stage, are capable of providing both high sensitivity and high bandwidth. In contrast, receivers based on HBT´s involving either the simple CE input stage or the cascoded input stage are capable of providing both high sensitivity and high bandwidth. Design examples, using HBT´s and HFET´s with intrinsic unity current gain frequency fτ=160 GHz and very low-capacitance msm photodetectors, indicate that high-speed receivers can be realized with bandwidth f3-dB≅20 GHz, and sensitivity as high as -28.7 dBm
  • Keywords
    bipolar integrated circuits; capacitance; field effect integrated circuits; frequency response; integrated optoelectronics; optical design techniques; optical feedback; optical noise; optical receivers; optimisation; photodetectors; sensitivity; shot noise; 160 GHz; 20 GHz; HBT; HFET; amplifying transistors; cascoded input stages; common-source; drain effective load conductance; effective transit time; feedback capacitance; field-effect transistors; gain-bandwidth product; heterojunction bipolar transistors; high sensitivity; input stages; maximally flat frequency response; optimization approach; optoelectronic integrated circuit receiver design; photodetectors capacitance; single-transistor common-emitter; total capacitance; transconductance; transimpedance OEIC receivers; unity loop-gain; Bandwidth; Capacitance; Design optimization; Feedback loop; Frequency; HEMTs; Heterojunctions; MODFETs; Optoelectronic devices; Photodetectors;
  • fLanguage
    English
  • Journal_Title
    Lightwave Technology, Journal of
  • Publisher
    ieee
  • Conference_Location
    9/1/1995 12:00:00 AM
  • ISSN
    0733-8724
  • Type

    jour

  • DOI
    10.1109/50.464738
  • Filename
    464738