DocumentCode :
3559080
Title :
Work-Function Engineering for 32-nm-Node pMOS Devices: High-Performance TaCNO-Gated Films
Author :
O´Sullivan, Barry J. ; Mitsuhashi, Riichirou ; Ito, Satoru ; Oikawa, Kota ; Kubicek, Stefan ; Paraschiv, Vasile ; Adelmann, Christoph ; Veloso, Anabela ; Yu, Hongyu ; Schram, Tom ; Biesemans, Serge ; Nakabayashi, Takashi ; Ikeda, Atsushi ; Niwa, Masaaki
Author_Institution :
IMEC, Leuven
Volume :
29
Issue :
11
fYear :
2008
Firstpage :
1203
Lastpage :
1205
Abstract :
We have demonstrated p-type field effect transistors (p-FETs) devices using a TaCNO metal gate for the first time. These p-FETs have threshold voltage values of - 0.4 and - 0.25 V for HfSiON and HfSiO gate dielectrics, respectively, with equivalent oxide thickness of 1.6-1.7 nm. The TaCNO metal shows a high effective work function (eWF) of 4.89 eV on thick SiO2 interface layer, although the eWF rolls off with reducing EOT. Excellent transistor characteristics are achieved, with Ion of 375 muA/mum at Ioff = 60 nA, for Vdd = 1.1V .
Keywords :
high-k dielectric thin films; power field effect transistors; work function; HfSiO; HfSiON; p-FETs; p-type field effect transistors; size 32 nm; voltage -0.4 V to -0.25 V; work-function engineering; Annealing; Dielectrics; Electrodes; FETs; Indium tin oxide; MOCVD; MOS devices; Plasma chemistry; Threshold voltage; Transistors; High- $kappa$; TaCNO; pFET; work-function engineering;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2008.2005214
Filename :
4655493
Link To Document :
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