Relaxation of acceptance limits (RAL): a global approach for parametric yield control of 0.1-μm deep submicron MOSFET devices

Author

Sitte, Renate ; Dimitrijev, Sima ; Harrison, H.Barry

Author_Institution

Div. of Inf. Technol., Defence Sci. & Technol. Organ., Salisbury, SA, Australia

Volume

8

Issue

3

fYear

1995

fDate

8/1/1995 12:00:00 AM

Firstpage

374

Lastpage

377

Abstract

An alternative method to fixed quality acceptance limits for in-line yield control is proposed. Our study is based on a sensitivity analysis, which has revealed that conventional parametric yield-control techniques using fixed in-line acceptance (tolerance) limits, as traditionally used in semiconductor manufacturing, are not efficient in deep submicron-size devices

Keywords

MOSFET; circuit optimisation; integrated circuit yield; quality control; semiconductor device manufacture; sensitivity analysis; tolerance analysis; 0.1 mum; critical processing parameters; deep submicron MOSFET devices; global approach; in-line yield control; parametric yield control; quality acceptance limits; relaxation of acceptance limits; semiconductor manufacturing; sensitivity analysis; Circuit simulation; Convergence; Electric breakdown; Electrons; Integrated circuit technology; Integrated circuit yield; Production; Refining; Semiconductor device manufacture; Stress;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

Conference_Location

8/1/1995 12:00:00 AM

ISSN

0894-6507

Type

jour

DOI

10.1109/66.406891

Filename

406891