• DocumentCode
    3559293
  • Title

    Building an FoC Using Large, Buffered Crossbar Cores

  • Author

    Simos, D. ; Papaefstathiou, I. ; Katevenis, M.G.H.

  • Author_Institution
    Univ. of the Aegean, Chios
  • Volume
    25
  • Issue
    6
  • fYear
    2008
  • Firstpage
    538
  • Lastpage
    548
  • Abstract
    The latest improvements in CMOS technologies have eliminated buffered crossbar memory requirements. Combined with a novel microarchitecture approach, these new technologies allow for implementation of a combined input-crosspoint queuing (CICQ), single-chip 32 times 32 switch as the core for a future fabric on a chip (FoC). This switch operates directly on variable-size packets, reducing overall data path complexity and increasing effective bandwidth.
  • Keywords
    CMOS integrated circuits; microprocessor chips; CMOS technology; combined input-crosspoint queuing method; fabric on a chip; microarchitecture approach; single-chip 32 times 32 switch; Aggregates; Buildings; CMOS technology; Energy consumption; Fabrics; Job shop scheduling; Microarchitecture; Packet switching; Switches; Throughput;
  • fLanguage
    English
  • Journal_Title
    Design Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2008.159
  • Filename
    4702878