DocumentCode
356026
Title
Analog EEPROM in standard process AMS 0.8 μm CMOS
Author
Abouchi, N. ; Gallorini, R. ; Vinard, C. ; Grisel, Richard
Author_Institution
LISA, CNRS, Villeurbanne, France
Volume
1
fYear
1999
fDate
1999
Firstpage
153
Abstract
The design of a non-volatile analog memory is presented. The specificity of this memory lies in the fact that it is realized in standard AMS 0.8 μm CMOS technology. The concept is based on the model of the floating gate transistor which sees its threshold voltage modified following the amount of carriers which are on its gate. The carrier injection physics rests on cold tunneling (Fowler-Nordheim effect)
Keywords
CMOS analogue integrated circuits; CMOS memory circuits; EPROM; analogue storage; tunnelling; 0.8 micron; AMS CMOS technology; Fowler-Nordheim tunneling; analog EEPROM; carrier injection; floating gate transistor; nonvolatile memory; threshold voltage; Analog memory; Application specific integrated circuits; CMOS process; CMOS technology; EPROM; Nonvolatile memory; Physics; Semiconductor device modeling; Threshold voltage; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location
Las Cruces, NM
Print_ISBN
0-7803-5491-5
Type
conf
DOI
10.1109/MWSCAS.1999.867231
Filename
867231
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