A 1 volt CMOS 2/4 level FSK digital demodulator for pager applications

Author

Shakeri, Kaveh ; Hashemi, Hossein ; Parsa, Ali ; Fotowat, Ali ; Rofougaran, Reza

Author_Institution

Dept. of Electr. Eng., Sharif Univ. of Technol., Tehran, Iran

Volume

1

fYear

1999

fDate

1999

Firstpage

219

Abstract

A 2/4-level FSK digital demodulator for integration in a single multi-standard pager chip is presented. The demodulator function is based on counting the zero crossings of the FSK signal. Frequency offset due to crystal imperfections, etc. is corrected. The output BER is 0.7% and 5% for input CNR of 4 dB for 2-level and 4-level FSK respectively with frequency offset of 2 kHz. This design uses 0.8-μm CMOS technology and operates with a power supply as low as 1 V

Keywords

CMOS integrated circuits; demodulators; digital radio; frequency shift keying; low-power electronics; mixed analogue-digital integrated circuits; paging communication; 0.8 mum; 1 V; 2-level FSK; 2/4 level FSK demodulator; 4-level FSK; CMOS technology; FSK digital demodulator; frequency offset correction; multi-standard pager chip; pager applications; zero crossings counting; Bit error rate; CMOS technology; Clocks; Costs; Counting circuits; Demodulation; Frequency shift keying; Frequency synchronization; Power supplies; Pulse circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1999. 42nd Midwest Symposium on

Conference_Location

Las Cruces, NM

Print_ISBN

0-7803-5491-5

Type

conf

DOI

10.1109/MWSCAS.1999.867247

Filename

867247