Simulating field programmable analog devices

FPGA architecture forms the basis for a new generation of programmable analog circuits allowing to easily realize analog functions by hardware. In order to make this technology applicable powerful tools for synthesis and simulation have to be made available. This article presents an approach to simulate programmable analog devices. Structural information and quantitative features are extracted from a given configuration of the programmtable analog device. After various simplifications of the netlist which are necessary to avoid large simulation times a netlist for SPICE is generated. Experimental results show that the simplified netlists generated by our tool are adequate to obtain good simulations which approximate the actual behavior of the programmed analog devices. The benchmark set comprises filters, signal generators and signal amplification functions