• DocumentCode
    3560571
  • Title

    An Efficient DPA Countermeasure With Randomized Montgomery Operations for DF-ECC Processor

  • Author

    Lee, Jen-Wei ; Hsiao, Ju-Hung ; Chang, Hsie-Chia ; Lee, Chen-Yi

  • Author_Institution
    Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    59
  • Issue
    5
  • fYear
    2012
  • fDate
    5/1/2012 12:00:00 AM
  • Firstpage
    287
  • Lastpage
    291
  • Abstract
    Nowadays, differential power-analysis (DPA) attacks are a serious threat for cryptographic systems due to the inherent existence of data-dependent power consumption. Hiding power consumption of encryption circuit or applying key-blinded techniques can increase the security against DPA attacks, but they result in a large overhead for hardware cost, execution time, and energy dissipation. In this brief, a new DPA countermeasure performing all field operations in a randomized Montgomery domain is proposed to eliminate the correlation between target and reference power traces. After implemented in 90-nm CMOS process, our protected 521-bit dual-field elliptic curve (EC) cryptographic processor can perform one EC scalar multiplication in 8.08 ms over and 4.65 ms over , respectively, with 4.3% area and 5.2% power overhead. Experiments from a field-programmable gate array evaluation board demonstrate that the private key of unprotected device will be revealed within power traces, whereas the same attacks on our proposal cannot successfully extract the key value even after measurements.
  • Keywords
    CMOS integrated circuits; field programmable gate arrays; private key cryptography; public key cryptography; CMOS process; DF-ECC processor; DPA countermeasure; EC scalar multiplication; cryptographic systems; data-dependent power consumption; differential power-analysis attacks; dual-field elliptic curve cryptographic processor; field-programmable gate array evaluation board; key-blinded techniques; power overhead; private key cryptography; randomized Montgomery domain; reference power traces; size 90 nm; word length 521 bit; Algorithm design and analysis; Correlation; Elliptic curve cryptography; Field programmable gate arrays; Hardware; Resistance; Dual fields; elliptic curve (EC) cryptography (ECC); power-analysis attacks; security system;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • Conference_Location
    4/19/2012 12:00:00 AM
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2012.2190857
  • Filename
    6187713