Title :
ANN digitally programmable analog synapse
Author :
Al-Nsour, Mahmoud ; Abdel-Aty-Zhody, H.
Author_Institution :
Dept. of Electr. & Syst. Eng., Oakland Univ., Rochester, MI, USA
Abstract :
An Artificial Neural Network (ANN) synapse with local digital weight storage capability is presented. It utilizes a novel, compact, voltage mode multiplying digital-to-analog converter to perform multiplication between an analog input and a digital weight. A 6-bit signed weight synapse chip has been implemented in VLSI through MOSIS 1.2 micrometer n-well CMOS technology. It occupies a total area of 1.35 mm2. With +3 Volts supply, the circuit accepts analog inputs within ±1 V. Output is also within ±1 V. Maximum power consumption is 20 mW and total error is less than 3%. Circuit analysis and performance evaluation is presented
Keywords :
CMOS analogue integrated circuits; VLSI; digital-analogue conversion; low-power electronics; multiplying circuits; neural chips; programmable circuits; 1.2 micron; 20 mW; 3 V; 6 bit; MOSIS CMOS technology; VLSI chip; artificial neural network; digital weight storage; digitally programmable analog synapse; low-power voltage-mode circuit; multiplying digital-to-analog converter; Artificial neural networks; CMOS technology; Capacitance; Circuits; Digital-analog conversion; Energy consumption; Laboratories; Microelectronics; Silicon; Voltage;
Conference_Titel :
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location :
Las Cruces, NM
Print_ISBN :
0-7803-5491-5
DOI :
10.1109/MWSCAS.1999.867311
