The implementation of basic morphological operations on FPGA using partial reconfiguration

This paper presents a hardware implementation of morphological operations based on dynamic and partial reconfiguration (DPR) technique. This technique allows reconfiguring a part of the FPGA area with different functionalities at runtime. It is a promising solution toincrease performance in the system. Our design allows todesigner to choose the adequate morphological operation (erosion or dilation) according the image constraints. We use xilinx tools and Virtex-5 FPGA board. To evaluate our implementation, we measure the performance in terms of area occupation and time reconfiguration. The results show the implementation of morphological operations on FPGA (Field Programmable Gate Array) using DPR can improve the performance and saving at least 11% of area.