Fabrication and characteristics of the suppressed sidewall injection magnetotransistor using a CMOS process

We report the implementation of a novel suppressed sidewall injection magnetotransistor. The novel device overcomes the restriction of the standard CMOS technology and achieves high linearity. The fabricated device is designed, based on the Hynix 0.6 μm standard CMOS technology and is experimentally verified. Experimental results show that the change of the collector current is extremely linear as a function of the magnetic induction at I_B=500 μA, V_CE=2 V and V_SE=5 V. The relative sensitivity is up to 120%/T. The nonlinearity of the fabricated device is measured about 1.4%.