• DocumentCode
    3564897
  • Title

    A deeply embedded processor for smart devices

  • Author

    Lozano, Hanni ; Ito, Mabo

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of British Columbia, Vancouver, BC, Canada
  • fYear
    2014
  • Firstpage
    79
  • Lastpage
    86
  • Abstract
    Smart embedded devices most often operate on batteries and in some cases these batteries cannot be replaced so frequently. As a result, both the available power and energy budgets are severely limited which forces designers to use low performance processors that use the least amount of power possible. The conundrum is that an increasing number of smart devices implement advanced functions that require more performance than what these processors can deliver. In this paper we propose a dual-issue 32-bit RISC processor that delivers up to 60% improvement in IPC (instruction-per-cycle) performance with less than 20% increase in power consumption compared to a scalar single-issue processor. The proposed processor is implemented in an FPGA and its performance is compared to similar publicly available embedded processors.
  • Keywords
    embedded systems; field programmable gate arrays; microprocessor chips; power aware computing; reduced instruction set computing; FPGA; IPC performance; deeply embedded processor; dual-issue 32-bit RISC processor; energy budgets; instruction-per-cycle; low performance processors; power budgets; power consumption; scalar single-issue processor; smart embedded devices; Automotive engineering; Benchmark testing; Field programmable gate arrays; Performance evaluation; Pipelines; Registers; Security; embedded processors; smart devices;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Smart Computing Workshops (SMARTCOMP Workshops), 2014 International Conference on
  • Type

    conf

  • DOI
    10.1109/SMARTCOMP-W.2014.7046671
  • Filename
    7046671