DocumentCode :
3565240
Title :
Performance evaluation of MoS2-WTe2 vertical tunneling transistor using real-space quantum simulator
Author :
Kai-Tak Lam ; Gyungseon Seol ; Jing Guo
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL, USA
fYear :
2014
Abstract :
Layered two dimensional (2D) semiconductor materials enable vertical interlayer heterojunctions (HJ) without the requirement of lattice matching. Interlayer transport through a MoS2-WTe2 vertical HJ transistor is studied by atomistic quantum device simulations. Ultra-steep subthreshold slope (SS) is obtained due to the utilization of band filtering as the switching mechanism. The simulator enables the investigation of the effects of atomic defects and trapped charges on the performance of the atomically thin HT transistor. It is shown that the ultra-steep SS in TMD vertical tunneling FETs is robust against both atomic defects in the TMD layers and charged impurity scattering.
Keywords :
field effect transistors; molybdenum compounds; performance evaluation; tungsten compounds; tunnelling; 2D semiconductor material; HJ; Interlayer transport; MoS2-WTe2; SS; TMD vertical tunneling FET; atomic defect; atomistic quantum device simulation; band filtering utilization; lattice matching; layered two dimensional semiconductor material; performance evaluation; switching mechanism; trapped charged impurity scattering; ultrasteep subthreshold slope; vertical interlayer heterojunction; Atomic layer deposition; Couplings; Lattices; Logic gates; Performance evaluation; Transistors; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2014 IEEE International
Type :
conf
DOI :
10.1109/IEDM.2014.7047141
Filename :
7047141
Link To Document :
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