Title :
CNTFET inverter: A high voltage gain logic gate
Author :
Farhana, Soheli ; Zahirul Alam, Ahm ; Khan, Sheroz
Author_Institution :
Dept. of Electr. & Comput. Eng., Int. Islamic Univ. Malaysia, Kuala Lumpur, Malaysia
Abstract :
Conventional CMOS technology provides a lot of opportunities in the field of electronics device. But presently, carbon nanotube field effect transistor (CNTFET) is a new technology for the application in the field of electronic device. Due to the limitation of the size of CMOS, CNTFETs are the promising substitute due to its nano scale size. CNTFET also shows the high stability, low power circuit design, high signal to noise margin (SNM) and high gain in the circuit design. A novel design of CNTFET based inverter with an optimum chiral vector is proposed in this paper. PSPICE platform is used to model and simulation this CNTFET inverter circuit. The proposed CNTFET inverter circuit is investigated based on noise margin characteristics. A maximum voltage gain of 45dB is observed from NCNTFET of the inverter and a high noise margin of 400mV and a low noise margin of 309mV are achieved from the proposed inverters. This approach is a useful technique for fabricating integrated logic devices and circuits based on CNTFETs.
Keywords :
CMOS logic circuits; carbon nanotube field effect transistors; logic design; logic gates; nanoelectronics; nanofabrication; CMOS technology; CNTFET inverter circuit; NCNTFET; PSPICE; carbon nanotube field effect transistor; circuit design; electronic device; high voltage gain logic gate; integrated logic circuit fabrication; integrated logic device fabrication; nano scale size; optimum chiral vector; signal to noise margin; CMOS integrated circuits; CNTFETs; Carbon nanotubes; Inverters; Noise; Simulation; CNTFET; gain; inverter; noise margin;
Conference_Titel :
Smart Instrumentation, Measurement and Applications (ICSIMA), 2014 IEEE International Conference on
Print_ISBN :
978-1-4799-8039-0
DOI :
10.1109/ICSIMA.2014.7047424
