A frequency synthesizer with a discrete-time sample-hold-reset loop filter dedicated to implantable medical microsystems

A 2.4 GHz integer-N frequency synthesizer is implemented in tsmc 0.18-μm CMOS process. This paper proposes a new supply regulated LC-VCO that reduces the impact of process variations and temperature on current consumption and phase noise is proposed, as well as a new single-ended charge pump architecture that offers very high output impedance over a wide output voltage range. This frequency synthesizer dedicated to implantable smart medical devices, optimized for ultra-low power operation, is being integrated in the transceiver of an implantable wireless sensing microsystem (IWSM), which is dedicated to in vivo monitoring of biological parameters such as PPG, ECG (Electrocardiography) and EMG. At 1.8 V supply voltage, measured results of the proposed prototype achieves a wide tuning range from 2.24 to 2.42 GHz, corresponding to 7.7%, a phase noise of-114.76 dBc/Hz at 1 MHz offset frequency from 2.4 GHz, a power consumption of 13.6 mW and an output power of-8.43 dBm for microsystem application.