High density routing with electrical performance analysis using fine line package structure

In this paper, the package solutions for die-to-die interconnection including fine-line substrate and ASE advance wafer level package (aWLP) have been purposed. The fin-line substrate has 3um trace width and 3um trace space on top layer with copper interconnection. For aWLP, the trace width and space of interconnection on redistribution layer (RDL) is the same with fine-line substrate. The different materials of RDL runner have also been evaluated in this paper. For these two package types, the electrical performance is presented through six experiments. Electrical evaluations are compared through S-parameter model and R/L/C values on different design situations. Besides, the variation of impedance is also showed in this study.