Low residue flux for 3D-IC u-bump stacking

In 3D-IC packages, the Si-to-Si stacking is joint by u-bump which has fine gap structure and high bump count. Because of the high density structure, the flux clean process face challenges. So, non-clean flux is another alternative. However, the flux residue can cause reliability issue such as UF delamination, corrosive relation, electro-migration due to the residue from flux. To reduce the flux residue side-effect, low residue flux is developed. In this study, there are three fluxes were used, one is normal non-clean flux (A), the others are low residue fluxes which has flux residue around 5% (flux B) and nearly 0% (flux C). The major items for flux comparison are wettability and UF compatibility. The results show the flux C can improve UF void to 0% but low wettability.